1.) In a Hexa-decimal system, (77)_{ 16} – (3B)_{16} is equal to?

A.) (3D)_{16}

B.) (60)_{16}

C.) (3C)_{16}

D.) (73)_{16}

2.) What is the output of following switch network?

3.) If this circuit is considered as 4 Bit full adder, which takes 42ns to produce the sum and 12ns to produce the carry. If a 32-bit parallel adder is constructed using the above 4-bit parallel binary numbers, what is the total time taken for adding two 32-bit binary numbers?

A.) 126ns

B.) 138ns

C.) 414ns

D.) 1344ns

4.) The two inputs x and y are applied to a NOR Gate. What will be the resulting waveform?

A.)

B.)

C.)

D.) None of the above

5.) What is the minimum number of NAND gates required to implement the following logic circuit?

A.) 3

B.) 4

C.) 5

D.) 6

6.) What is the minimum number of NOR gates required to implement the following Boolean function? (Assume both normal and complement form of the variable is present.)

A.) Three

B.) Four

C.) Five

D.) Six

7.) For a buffer, input and output logic level are shown below

Which of the following statement/s is/are correct?

A.) Buffer is good “1” pass circuit.

B.) Buffer is good “0” pass circuit.

C.) Buffer is poor “1” pass circuit.

D.) Buffer is poor “0” pass circuit.

8.) How many 2-to-4 line decoders are required to construct a 5×32 line decoder?

A.) 8

B.) 11.0

C.) 10

D.) 9

9.) In place of connecting D_{0} to ground, if we connect D_{0} to V_{DD}, what will be the output?

10.) What is the output?

A.)

B.) 1

C.) 0

D.)

Answers

1.) C

2.) B

3.) A

4.) A

5.) C

6.) D

7.) B, C

8.) D

9.) B

10.) B

Nice article!

Answer for q6 is option c. FIVE

assuming NOR gate can have any no.of inputs